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HT8658/HT8659 Voice Recorder (DRAM)
Features
* * *
* *
Single power supply: 4.5V~5.5V ADM coding algorithm DRAM options: - 4x256K bits - 3x1M bits A built-in 2 stage MIC amplifier A built-in low pass filter
*
* *
Data rate options (bits per second): - 32K bps - 22K bps - 16K bps - 11K bps A status LED indicator Auto playback
Applications
* *
Message box Recorder
*
Toys
General Description
The HT8658/HT8659 are single chip CMOS LSIs using an ADM coding technology. They are designed for applications on recording sounds. The HT8658 and HT8659 have almost the same functions apart from the reset time. The reset time of the HT8658 has to be over 4 seconds but of the HT8659 over 2 seconds. Blocks within each chip include a DRAM interface circuit, signal amplifier, 8 bit ADC and internal low pass filter. Encoded data are stored in external DRAMs and played back after the PLYB pin be triggered. Each IC provides four kinds of sampling rate to be selected, namely 32K/22K/16K/11K bps (bits per second). A higher sampling rate results in sounds of better quality but sacrifices the recording time. With such a powerful built-in circuit, only few components are required for normal applications. Each IC can be offered in a dice form or 28 pin dual-in-line package.
Pin Assignment
AS4 AS3 AS2 AS1 AS0 VDD AIN AO BIAS FOUT VSS CAS1B CAS2B CAS3B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 AS5 AS6 AS7 AS8 AS9 OSC1 OSC2 DATA RASB WRB RESB RECB PLYB LEDB AS4 AS3 AS2 AS1 AS0 VDD AIN AO BIAS VOUT VSS CAS1B CAS2B CAS3B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 AS5 AS6 AS7 AS8 AS9 OSC1 OSC2 DATA RASB WRB RESB RECB PLYB LEDB
HT8658A/8659A - 28 DIP
HT8658B/8659B - 28 DIP
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HT8658/HT8659
Block Diagram
Pad Coordinates
Unit: mil
Pad No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Chip size: 138 x154 (mil)2
X
-62.92 -62.92 -62.92 -62.92 -62.92 -62.92 -62.92 -62.92 -62.92 -62.92 -46.43 -38.78 33.55 43.16 52.76
Y
29.69 19.30 8.37 -2.30 -13.22 -23.89 -34.81 -45.48 -56.40 -67.07 -70.76 -70.76 -70.76 -70.76 -70.76
Pad No.
16 17 18 19 20 21 22 23 24 25 26 27 28 29
X
62.37 62.37 62.71 62.71 62.71 62.71 62.71 62.71 62.71 62.71 50.98 -45.07 -54.93 -62.58
Y
-70.76 -54.61 -44.84 -34.81 -23.04 -13.94 -2.93 8.88 58.69 70.34 70.34 70.51 70.51 70.51
The IC substrate should be connected to VDD in the PCB layout artwork.
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Pad Description
Pad No. Pad Name I/O Internal Connection
Pull-High CMOS Pull-High CMOS Pull-High CMOS Pull-High CMOS
Description
Input: For IC test only Output: Address output for DRAM of 1Mb and column address strobe for DRAM of 256Kb Input: For IC test only Output: Address output to DRAM Input: For IC test only Output: Address output to DRAM Input: For IC test only 1: For IC test only 0: Not applicable Output: Address output to DRAM Input: DRAM type selection: 1: 256Kb (without external pull-low resistors) 0: 1Mb (with an external pull-low resistor) Output: Address output to DRAM Input: Manual/Auto playback selection: 1: Manual (without external pull-low resistors) 0: Auto (with an external pull-low resistor) Output: Address output to DRAM DRAM chip number selection (refer to the functional description) Output: Address output to DRAM Input: Sampling rate selection (refer to the functional description) Output: Address output to DRAM Positive power supply Pre-amplifier input pin Pre-amplifier output pin Amplifier gain should be adjusted between AIN and AO by a resistor. For internal OP bias de-coupling Audio signal output (non-filtered, output directly) Audio signal output through an internal low-pass filter Negative power supply (GND) Input:
1
AS9
I/O
2 3
AS8 AS7
I/O I/O
4
AS6
I/O
5
AS5
I/O
Pull-High CMOS
6
AS4
I/O
Pull-High CMOS
7,8
AS3,AS2
I/O
Pull-High CMOS Pull-High CMOS -- -- -- -- -- -- --
9,10 11 12 13 14 15 16 17
AS1,AS0 VDD AIN AO BIAS VOUT FOUT VSS
I/O I I O I O O I
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HT8658/HT8659
Internal Connection
CMOS Open Drain NMOS Pull-High Pull-High Pull-High CMOS CMOS -- --
Pad No.
18~20 21 22 23 24 25 26 27 28 29
Pad Name
CAS1B~ CAS3B LEDB PLYB RECB RESB WRB RASB DATA OSC2 OSC1
I/O
O O I I I O O I/O O I
Description
Column address strobe for DRAM1~DRAM3 Status indicator when LSI is active Play/Pause trigger input (toggle function) Record/Pause trigger input (toggle function) Reset the system or the play counter Write enable signal output for DRAM interface Row address strobe output for DRAM interface Encoded data I/O pin Oscillation external resistor connect pin
Absolute Maximum Ratings
Supply Voltage .................................. -0.3 to 6V Input Voltage ............... VSS-0.3 Vto VDD+0.3V Storage Temperature ............... -50C to 125C Operating Temperature ............. -20C to 70C (Ta=25C)
Electrical Characteristics
Symbol
VDD IDD ISTB IOL VIH VIL FOSC VOUT
Parameter
Operating Voltage Operating Current Stand-By Current LED Sink Current "H" Input Voltage "L" Input Voltagse System Frequency Max. Vout Output Voltage --
Test Condition VDD Condition
-- No load, FOSC=384KHz -- VOL=0.5V -- -- ROSC=91K RL>50K
Min.
4.5 -- -- 3.0 0.7VDD 0 -- 1.5
Typ.
5.0 0.8 40 5.0 -- -- 384 --
Max.
5.5 2.0 100 -- VDD 0.2VDD -- --
Unit
V mA
A
5V 5V 5V -- -- 5V 5V
mA V V KHz VP-P
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HT8658/HT8659
Functional Description
The HT8658/HT8659 are single chip LSIs with an external DRAM (dynamic random access memory). They are designed for applications on recording sounds. The recording length is decided by the data rate along with the size of an external memory. The type as well as amount of DRAM, operation mode and sampling rate are determined by the connection of the AS0~AS6 pins. The HT8658/8659 provide 2 audio outputs. One is filtered by an internal low pass filter for the sake of improving sound quality in addition to minimizing external required components. The other is non-filtered and a voice signal can be filtered with an external circuit to decide the audio cut-off frequency as well as band width. The two chips have the same functions except the reset time as shown:
Name
HT8658 HT8659
Reset Time (Minimum)
4 seconds 2 seconds
Initial setting of operation mode
The HT8658/HT8659 load the statuses of the AS0~AS6 pins into a mode register after power is initially turned on or the system is reset. These pins are internally built with pull-high resistors so that all inputs with "1" are the default value of the mode register. External pull-low resistors which are tied to the AS0~ AS6 pins defines the operation mode of the ICs as shown in the following table:
AS0 AS1 AS2 AS3 AS4 AS5 AS6
0 1 1 0 X X X X X X X X X X 0 0 1 1 X X X X X X X X X X X X X X 0 1 0 1 X X X X X X X X X X 0 0 1 1 X X X X X X X X X X X X X X 1 0 1 0 X X X X X X X X X X X X X X 1 0 X X X X X X X X 1 1 0 0 X X
Function Description
Data rate: 32K bps Data rate: 22K bps Data rate: 16K bps Data rate: 11K bps DRAM chip number: 4 pcs DRAM chip number: 3 pcs DRAM chip number: 2 pcs DRAM chip number: 1 pcs Operation mode: Normal mode Operation mode: Auto play back mode Operation mode: Not applicable Operation mode: Not applicable DRAM type: 256Kb DRAM type: 1Mb
Notes: 1."0" connects an external pull-low resistor to ASn, where n=0~6. 2."1" connects no external pull-low resistor to ASn, where n=0~6. 3."X" means don't car.
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HT8658/HT8659
Recording capacity Record function
The HT8658/HT8659 offer 4 kinds of voice sampling rate, namely 32K, 22K, 16K and 11Kbps (based on a system frequency of 384KHz), selectable by the connection of the AS0 and AS1 pins. The voice sampling rate decides the recording capacity of the ICs in addition to the type and amount of DRAM. A higher sampling rate results in sounds of better quality but shortens the recording time.
The HT8658/HT8659 enter the recording state from the standby state when the memories are not full and the REC key is triggered as well. In the recording state, sounds input from an external microphone are coded by an internal ADM (adaptive delta modulation) algorithm and saved in an external memory until the memories are all full or the REC key is retriggered. During recording, recording will pause and the recording counter stop counting by retriggering the REC key. At this time, if the memories are not full and the REC key is triggered again, the ICs will record sounds from the pause position. Once the memories are full, recording will be terminated and any retrigger to the REC key be ignored. After recording is stopped, the HT8658/HT8659 will play back the recorded sounds automatically in the AUTO PLAY mode. They, on the other hand, will play back the recorded sounds by manually triggering the PLAY key in the normal mode.
Play function
Sampling Rate
32K bps 22K bps 16K bps 11K bps
DRAM Size (Maximum)
1Mbx3 1Mbx3 1Mbx3 1Mbx3 Recording Time
Recording Time
94 seconds 136 seconds 188 seconds 272 seconds
Memory selection
The HT8658/HT8659 provide a DRAM interface circuit. The type as well as amount of DRAM decides the recording length of the ICs at a designated sampling rate. There are 2 kinds of DRAM, namely 256Kb and 1Mb, selectable by the connection of the AS5 pin. The ICs can interface with a maximum of 4 DRAMs for the 256Kb type but 3 DRAMs for the 1Mb type. The amount of DRAMs is decided by the connection of the AS2 and AS3 pins.
AS5
1 1 1 1 0 0 0 0
AS3
1 1 0 0 1 1 0 0
AS2
1 0 1 0 1 0 1 0
Memory Size
256Kbx1 256Kbx2 256Kbx3 256Kbx4 1Mbx1 1Mbx2 1Mbx3 1Mbx3
The HT8658/HT8659 provide 2 kinds of playing modes, namely normal mode and AUTO PLAY mode. In the normal mode, the ICs will play back the recorded sounds when recording is terminated and the PLAY key is triggered. In the AUTO PLAY mode, they will play back the recorded sounds automatically without manually triggering the PLAY key once recording is terminated. In the process of playing sounds, triggering the PLAY key will pause the playing back in addition to the playing counter. To resume playing back, simply retrigger the PLAY key. Playing back will start at the pause position.
Notes: 1. "0" connects an external pull-low resistor to ASn, where n=2,3, or 5. 2. "1" connects no external pull-low resistors to ASn, where n=2, 3 or 5.
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HT8658/HT8659
AS4
1 0 1 0
AS6
1 1 0 0
Function
Normal mode AUTO PLAY mode Not applicable Not applicable
Notes: 1. "0" connects an external pull-low resistor to ASn, where n=4, 6. 2. "1" connects no external pull-low resistor to ASn, where n=4, 6.
System reset
The reset time of the HT8658 and HT8659 is different. The HT8658 will reset the system if the RES key is pressed more than 4 seconds and reset the playing counter if the RES key is pressed less than 4 seconds. The HT8659, on the other hand, will reset the system if the RES key is pressed over 2 seconds and reset the playing counter if the key is pressed less than 2 seconds. Once the playing counter is reset, the ICs will play back the recorded data from the beginning by triggering the PLAY key. All of the recorded data will be deleted after the system is reset.
Indicate function
The HT8658/HT8659 provide an LEDB pin to indicate the operation status of the LSI through an external LED display. The LEDB pin is of high impedance and an external LED is switched off in the standby state. LEDB, on the other hand, remains at a low level and LED is turned on in the recording state. In the playback state, LED flashes with the volume of output sounds. When the system is reset, it flashes at a 2Hz rate.
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HT8658/HT8659
Operation flowchart
* HT8658
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HT8658/HT8659
* HT8659
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HT8658/HT8659
* Normal mode operation (AS4=1, AS6=1)
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HT8658/HT8659
* Auto playback mode (AS4=0, AS6=1)
Notes: 1. RECC: Recording counter 2. PLAYC: Playing-back counter 3. m,n: DRAM addresses
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HT8658/HT8659
Application Circuits
With a DRAM interface of 1Mb (Chip form)
100Kx7 OSC2 DATA RASB 120K OSC1 WRB RES
270K 29 28 27
26 25 RESB 24
1 17 3 2 18
DI DO RASB WRB VSS CASB3 CASB2 CASB1 VDD
A9 15 A8 14 A7 13 12 A6 11 A5 10 A4 8 A3 7 A2 6 A1 5 A0
AS9
AS8
AS7 AS6 AS5 AS4 AS3 AS2 AS1 AS0
1 2 3 4 5 6 7 8 9 11 12 10 VDD AIN 23
REC RECB
HT8658/HT8659
22 21 20 19 18 17 13 14 15 16 AO BIAS VOUT FOUT
PLYB LEDB CAS3B CAS2B CAS1B VSS
PALY
16 9
300
DRAM 1Mbx3
0.1
100
100 10V 22 10V 0.1 20K
0.1 20K
100 10V 100/10V
VDD 1N4001
4.7K
MIC
3
6 5 0.1 10
2 LM386 4
220 10V SPK 8 VCC 6V
he IC substrate should be connected to VDD in PCB layout artwork.
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HT8658/HT8659
With a DRAM interface of 1Mb (Package form)
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HT8658/HT8659
With a DRAM interface of 256Kb (Chip form)
100Kx7 OSC2 DATA RASB
120K OSC1
WRB
270K 29 28 27
26 25 RESB 24
RES
2 14 4 3 16 15
8
DI DO RASB WRB VSS CASB4 CASB3 CASB2 CASB1 VDD
A8 1 A7 9 A6 13 A5 10 A4 11 A3 12 6 A2 7 A1 5 A0
AS9 AS8 AS7 AS6 AS5 AS4 AS3 AS2 AS1 AS0
1 2 3 4 5 6 7 8 9 11 12 10 VDD AIN 23
RECB
REC PLAY
HT8658/HT8659
22 21 20 19 18 17 13 14 15 16 AO VOUT BIAS FOUT
PLYB LEDB CAS3B CAS2B CAS1B VSS
300
DRAM 256Kbx4
0.1
100
100 10V 22 10V 0.1 20K
0.1 20K
100 10V 100/10V
VDD 1N4001
4.7K
MIC
3
6 5 0.1 10
2 LM386 4
220 10V SPK 8 VCC 6V
he IC substrate should be connected to VDD in PCB layout artwork.
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HT8658/HT8659
With a DRAM interface of 256Kb (Package form)
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26th Sep '96

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